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IJERD : Volume 9, Issue 2

Avinash Shrotriya, D.K Saxena, Mohit Kumar Singh

Noise in Power Line Communication Channel: an Overview
  • Abstract
  • Keywords
  • Reference
  • Full Article
The power line communication technology is now considered as a good alternative for the implementing communication network. Digital networks can be established using the same set of wires that is use to distribute the power signal through the power-line channel(PLC) because powerline networks are excellent infrastructure for broadband data transmission however various noise exist due to stochastic change in the network load impedance. This paper is an attempt to identify different type of noise in PLC channel and investigate the performance of indoor channel of PLC system. The noise seen in the power-line channel varies with frequency, time and from line to line .in this paper we classify different type of noises its characteristics and the process to remove it from power line channel.
Plc, Ofdm.Middleton A, Nakagami-M Distribution.S.

[1]. J. Meng," Noise analysis of power line communication using spread spectrum", IEEE Trans. Power. Del., Vol.22, No.3, pp1470-1476,July 2007.
[2]. M.Tlich,"Novel approach for PLC impulsive noise modeling", ISPLC‟07,pp505-510,2007.
[3]. M. Zimmermann, K. Dostert, "A Multipath Model for the Power LineChannel", IEEE Trans. Commun., vol. 50, no. 4, pp.553-559, April 2002.

[4]. Olaf G. Hooijen,"A Channel Model for the Residential Power Circuit Used as a Digital Communications Medium", IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, VOL. 40, NO. 4,pp. 331-336, NOVEMBER 1998
[5]. 0. Hooijen , "On the Channel Capacity of Residential Power Circuit used as digital communication circuit," IEEE Commun. Lett,, Vol.2,No.10 pp. 267-268, 1998.....

Citation
Avinash Shrotriya, D.K Saxena, Mohit Kumar Singh "Noise in Power Line Communication Channel: an Overview" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0001. India
Page 01-05
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R.Sri Rama Devi, G.Prabhakar Rao, Usha Kiranmai

Partially Melted Zone in A356 Al-Si Alloy Welds-Effect of Technique and Prior Condition

  • Abstract
  • Keywords
  • Reference
  • Full Article
Pressure die cast A356 Al-Si alloy with strontium modification was fusion welded by the continuous current gas tungsten arc welding (CCGTAW) and pulsed current gas tungsten arc welding(PCGTAW) techniques. Partially melted zone (PMZ) is an important region, as it is the weak link in the weldments. It is significantly affected by the welding techniques used and prior condition of the alloy. In the present work, effect of welding techniques on PMZ of A356 Al-Si alloy was studied. Microstructural changes in PMZ are related to the welding techniques. Susceptibility to liquation was found to be less in the weld made in as cast condition compared to that of artificially aged condition (T6). Resistance to liquation in PMZ was found to be better in as cast condition of the alloy with pulsed current gas tungsten arc welding, when compared to continuous current gas tungsten arc welding technique.
Partially Melted Zone in A356 Al-Si Alloy Welds-Effect of Technique and Prior Condition.
[1]. Q. Han and S. Viswanathan, Microstructure Prediction in A356 Alloy Casting.Light Metals, 51 p. 609- 614. 2000.
[2]. T. Kobayashi, T. Ito, Q. Yao and N. Fatahalla, Fatigue Properties and Microstructure of Al-Si-Cu System Casting Alloys. Materials Science and Technology, 15: p. 1037-1043. 1999.
[3]. S. Das, A. H. Yegneswaran and P. K. Rohatgi, Characterization of Rapidly Solidified Aluminum- Silicon Alloy. Journal of Materials Science, 22: p. 3173-3177. 1987.
[4]. Y. L. Liu, S. B. Kang and H. W. Kim, The Complex Microstructures in an as- Cast Al-Mg-Si Alloy. Materials Letters, 41(12): p. 267-272, 1999.
[5]. L. Backerud, G. Chai and J. Tamminen, Solidification Characteristics of Aluminum Alloys Vol. Volume 2: Foundry Alloys., Sewden: AFS, 1990.....
Citation
R.Sri Rama Devi, G.Prabhakar Rao, Usha Kiranmai "Partially Melted Zone in A356 Al-Si Alloy Welds-Effect of Technique and Prior Condition" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0002. India
Page 06-12
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J. Arun, S. Pravin Kumar, M. Venkatesh, A.S. Giridharan

Reliability Study on Spark Plugs Using Process Failure Mode and Effect Analysis
  • Abstract
  • Keywords
  • Reference
  • Full Article
Failure Mode and Effect Analysis (FMEA) is a systematic tool for identifying the effects or consequences of a potential product or process failure and to eliminate or reduce the chance of failure occurring. The FMEA is a proactive approach in solving potential failure modes. Ideally, FMEAs are conducted in the product design or process development stages, although conducting an FMEA on existing products and processes can also yield substantial benefits. This paper provides the use of FMEA for improving the reliability of spark plugs in order to ensure the engine efficiency which in turn improves the bottom line of automotive industries. Thus the various possible causes and their effects along with the prevention are discussed in this work. Severity rating, Occurrence rating, Detection rating and Risk Priority Number (RPN) are some parameters, which are to be determined. These are the steps taken during the design phase of equipment to ensure that the reliability requirements have been properly allocated and that a process for continuous improvement exists. Here, the FMEA technique is applied on the spark plug operation and the defects are found. This work serves as a failure prevention guide and also would improve the reliability of spark plug and thus ensuring the effective vehicle performance.
FMEA, Spark Plug, Failure Modes, Severity rating, Occurrence rating, Detection rating, Risk Priority Number.

[1]. V Janarthanan, D Rajenthira Kumar. Root Cause analysis & process failure mode and effect analysis of TIG Welding on SS 3041 material (Proceeding of NC MISAA 2013, copyright 2013 PSGCT)
[2]. Aravind P, Rooban Babu R, Arun Dhakshinamoorthy, Venkat Prabhu N, Subramanian SP¸ An integrated approach for prediction of failures by process failure mode and effect analysis (PFMEA) in MIG Welding-a predictive analysis (ISBN-978-93-82208-00-6).
[3]. Robin E. McDermott, Raymond J. Mikulak, Michael R. Beauregard. The basics of FMEA-Productivity press (1996).
[4]. Virtanen S. and Hagmark PE. Simulation and Calculation of Reliability Performance and Maintenance Costs. IEEE, Proceeding: Annual Reliability and Maintainability Symposium (RAMS). January 22 – 25, 2007. Orlando, FL, USA. pp. 34 – 40.
[5]. Taylor CF. Internal combustion engine in theory and practice: vol. 2: combustion, fuels, materials, design. Boston: MIT Press; 1985.....

Citation
J. Arun, S. Pravin Kumar, M. Venkatesh, A.S. Giridharan "Reliability Study on Spark Plugs Using Process Failure Mode and Effect Analysis" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0003. India
Page 13-21
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Aru Okereke Eze, Prof. Ogbonnaya Okoro, Opara, F.K

The Computer Architecture of a Microcontroller Based Transistor Tester with a Logic Disp
  • Abstract
  • Keywords
  • Reference
  • Full Article
This work exploits the design and implementation of a microcontroller based transistor tester with a logic control. Microcontroller based transistor tester is a device used to test the electrical behaviour of transistors and diode states within transistors. The transistor device is commonly used for circuitry and electronics. Most transistor testers test whether or not a transistor is sinking input (NPN) or sourcing output (PNP). This work is aimed at designing a microcontroller based transistor tester required to test Bipolar Junction Transistor, Field Effect Transistor and Uni-junction Transistor. It is also aimed to experimenting and producing a well reliable transistor, not only testing Bipolar, Field Effect and Uni-junction transistor but also other electronics component useful in daily human lives.
Microncontroller, Transistor Tester, Liquid Crystal Display, Adc0804, Cpu, Rom, Ram, Etc.
[1]. J. Lim and A. Oppenheim (1988): Advanced Topics in Digital Processing. Prentice Hall limited, New Delhi 2nd edition. Pg 567.
[2]. Edward Roll Tuft (1990): Principles of Information display. Graphic Press Canada, 3rd edition. Pg 890 and 989.
[3]. B. BORAT (1997) : A course in digital processing Wiley 6th edition. Smith Publisher Washington. Pg 58-63
[4]. Lawrence A. Duarte (1998): The Microcontroller Beginner's Handbook. 2nd Edition. United States of America: Prompt Publication. pg 3-5.
[5]. Joseph Greenfield (1999): Digital Electronic Design. Oxford University press 4th edition. Pg 89,567,905 and 1023.....
Citation
Aru Okereke Eze, Prof. Ogbonnaya Okoro, Opara, F.K "The Computer Architecture of a Microcontroller Based Transistor Tester with a Logic Disp" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0004. Nigeria
Page 22-29
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Mrs. Minakshi R. Rajput

Iris feature extraction and recognition based on different transforms
  • Abstract
  • Keywords
  • Reference
  • Full Article
This paper reviewed the literature regarding iris recognition. It explains need and significance of this research .Hypothesis on iris recognition is also explored . Different stages of iris recognitions are also explained and at the last it clarifies how Contoulet Transform is more admissible for iris feature extraction.
Biometrics,contourlet transform,feature extraction,iris recognition.
[1]. J. Daugman, ―How iris recognition works,‖ IEEE Trans. Circuits Syst. Video Technology., vol. 14, no. 1, pp. 21–30, 2004.
[2]. Chia-Te Chou, Sheng-Wen Shih,‖ Non-Orthogonal View Iris Recognition System‖, IEEE transactions on
circuits and systems for video technology, vol. 20, no. 3, pp 417, March 2010.
[3]. Shreyas Venugopalan,‖ How to Generate Spoofed Irises From an Iris Code Template‖, IEEE transactions on information forensics and security, vol. 6, no. 2, pp 10,11,23-27,June 2011.
[4]. Yulin Si, Jiangyuan Mei, and Huijun Gao,‖ Novel Approaches to Improve Robustness, Accuracy and Rapidity of Iris Recognition Systems‖, IEEE transactions on industrial informatics, vol. 8, no. 1, pp.34-37,February 2012.
[5]. Yung-Hui Li,‖ An Automatic Iris Occlusion Estimation Method Based on High-Dimensional Density Estimation‖, IEEE transactions on pattern analysis and machine intelligence, vol. 35, no. 4,pp.1-10, April 2013....
Citation
Mrs. Minakshi R. Rajput "Iris feature extraction and recognition based on different transforms" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0005. India
Page 30-35
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ANED 06.067X/E09023035 aned
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Prof. Ms. Neha D. Acharya

Implimentation of SpaceWire Standard in SpaceWire CODEC using VHDL
  • Abstract
  • Keywords
  • Reference
  • Full Article
Spacewire is a relatively new data communication standard, specifically developed for space use. It has been used in various mission of ESA, NASA; the current example is Lunar Reconnaissance Orbiter (LRO). Use of standard interface can reduce the integration cost and allows reusability of developed product across several missions. SpaceWire codec that encodes the user data in SpaceWire protocol format and decodes the SpaceWire protocol format data has been developed using VHDL at register transfer level. Use of HDL based
development instead of chip based solution will help to achieve miniaturize design as the HDL development can be implemented in the same FPGA which is used for other functions of a given circuit block. One major limitation factor of standard asynchronous interfaces is the limitation on the accuracy and precision with which
time synchronization between two subsystems can be achieved. Spacewire has provision for time codes to achieve some degree of isochronous operation. Using SpaceWire in the nominal way provides accuracy of synchronization depends on the transmitted clock frequency.
Implimentation of SpaceWire Standard in SpaceWire CODEC using VHDL.

[1]. ECSS E-ST-50-12C (Latest Version)- SpaceWire: Links, nodes, routers and networks – by ECSS,
31July2008
[2]. SpaceWire Codec VHDL User Manual - by University of Dundee
[3]. Spacewire: STAR-Dundee Product Overview - by University of Dundee
[4]. www.aeroflex.com/spacewire
[5]. "SpaceWire Homepage," www.estec.esa.nl/tech/spacewire/standards

[6]. www.ccsds.org.

Citation
Prof. Ms. Neha D. Acharya "Implimentation of SpaceWire Standard in SpaceWire CODEC using VHDL" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0006. India
Page 36-40
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ANED 06.067X/F09023640 aned
aned 067X-0902-3640

 

M. H. Gulzar

Location of Zero-free Regions of Polynomials
  • Abstract
  • Keywords
  • Reference
  • Full Article
In this paper we locate zero-free regions of polynomials when their coefficients are restricted to certain conditions.
Mathematics Subject Classification: 30C10, 30C15
Coefficient, Polynomial, Zero.

[1]. K. K. Dewan, Extremal Properties and Coefficient estimates for Polynomials with restricted Zeros and on location of Zeros of Polynomials, Ph.D. Thesis, IIT Delhi, 1980.
[2]. N. K. Govil and Q. I. Rahman, On the Enestrom- Kakeya Theorem, Tohoku Math. J. 20(1968),126- 136.
[3]. M. H. Gulzar, On the Location of Zeros of Polynomials with Restricted Coefficients, Int. Journal of Advanced Scientific Research and Technology, Vol.3, Issue 2, June 2012, 546-556.
[4]. M. H. Gulzar, On the Zeros of Complex Polynomials in a Given Circle, International Journal of Engineering Research and Development, Vol. 8, Issue 11 (October 2013), 54-61.
[5]. M. Marden, Geometry of Polynomials,Math. Surveys No. 3, Amer. Math. Society (R.I. Providence) (1996)....

Citation
M. H. Gulzar "Location of Zero-free Regions of Polynomials" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0007. India
Page 41-52
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ANED 06.067X/G09024152 aned
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J. Dhananandhini, C.M. Niranjana, K. Rajeswari, R.Karthick

Detecting Sensor Node Failure and Node Scheduling Scheme for Wsn
  • Abstract
  • Keywords
  • Reference
  • Full Article
The Wireless Sensor Network is build of "nodes"- from a few to several hundreds or even thousands, where each node is connected to one sensor. A node in a wireless sensor network that is capable of performing some process and gather sensor information and communicating with other connected nodes in the network. The nodes to perform transmissions not successfully, because there are some of the problems may arise in that they are 1) if node failure will occur in any stage, 2) security issues arises due to transmission involves number of nodes, 3) increasing transmission time due to more number of nodes will be active at a time to complete a particular task. To solve this problem we propose new algorithms are 1) node sensing and node failure for activity detection, 2) discovering routes and give security using neighbourhood keys, 3) which node
involves to perform the action that current node only to be active at a time other to be sleeping mode using node scheduling scheme.
Wireless sensor networks, neighbourhood node, node failure, sensor node scheduling , faulttolerance, Security.

[1]. Mokhtar Beldjehem " Toward a Multi-Hop, Multi-Path Fault-Tolerant and Load Balancing Hierarchical Routing Protocol for Wireless Sensor Network" Wireless Sensor Network, 2013, 5, 215- 222
[2]. Amin Hassanzadeh, Radu Stoleru, Jianer Chen Department of Computer Science and Engineering, Texas A&M University "Efficient Flooding in Wireless Sensor Networks
[3]. Secured with Neighborhood Keys" 2011 IEEE 7th International Conference on Wireless and Mobile Computin978-1-4577-2014-7/11
[4]. Arabinda Nanda, Amiya Kumar Rath, Saroj Kumar Rout "Node Sensing & Dynamic Discovering Routes for Wireless Sensor Networks" (IJCSIS) International Journal of Computer Science and Information Security, Vol. 7, No. 3, March 2010
[5]. JUNGEUN CHOI, JOOSUN HAHN AND RHAN HA, "A Fault-tolerant Adaptive Node Scheduling Scheme for Wireless Sensor Networks, JOURNAL OF INFORMATION SCIENCE AND ENGINEERING 25, 273-287 (2009)...

Citation
J. Dhananandhini, C.M. Niranjana, K. Rajeswari, R.Karthick "Detecting Sensor Node Failure and Node Scheduling Scheme for Wsn" published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0008. India
Page 53-56
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Om Prakash, V. Upadhyay, A.K. Agrawal, P.N. Pandey

A Mathematical Model on the Two –Phase Hepatic Blood Flow in Arteriols with Special Refrence to Hepatitis B.
  • Abstract
  • Keywords
  • Reference
  • Full Article
In the present paper we have formulated the Hepatic blood flow in Arteriols. Keeping in view the nature of Hepatic circulatory system in human body. The viscosity increases in the arteoles due to formation of Roulex along axis of red blood cells as we know that the arterioles are remote from heart and proximate to the Liver. P.N. Pandey and V. Upadhyay have considered that the blood flow as two phased, one of which that of red blood cells and other is plasma. They have also applied the Herschel bulkley Non-Newtonian modal in Bio fluid mechanical setup. We have collected a clinical data in case of Hepatitis B for Hematocrit versus blood pressure. The graphical presentation for a particular paramatic value is very close to the clinical observation. The overall presentation is in tensorial form and the solution technic adopted are in analytical as well as numerical. The role of hematocrit is explicit in the determination of blood pressure in case of Hepatic disease Hapatitus B.
A Mathematical Model on the Two –Phase Hepatic Blood Flow in Arteriols with Special Refrence to Hepatitis B.
[1]. Berkow, Robert, ed. Merck Manual of Medical Information. Whiehouse Station, NJ:Merck Research Laboratories, 1997.
[2]. A.K. Berry, A.S.kapoor, R. Nagabhushanam, Animal phisiology, 1981.
[3]. Whynne HA, Cope L.H. Mutch E at al. The effectb of age upon liver, 9,297-301, 1989.
[4]. Cirrhosis overview National Digestive Information Clearing house, Retrieved on 01-22, 2010.
[5]. Dienstag JL, Hepatitis vairus infection, N Engel j med. 359; 1486-1500, 2008....
Citation
Om Prakash, V. Upadhyay, A.K. Agrawal, P.N. Pandey "A Mathematical Model on the Two –Phase Hepatic Blood Flow in Arteriols with Special Refrence to Hepatitis B." published at International Journal of Engineering Research and Development, Volume 9, Issue 2 (November 2013)
MID 0902.067X.0009. India
Page 57-62
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